diff --git a/sys/arch/x86/x86/ioapic.c b/sys/arch/x86/x86/ioapic.c
index 35e3db0f183..c71cc85f732 100644
--- a/sys/arch/x86/x86/ioapic.c
+++ b/sys/arch/x86/x86/ioapic.c
@@ -494,6 +494,7 @@ ioapic_reenable(void)
 			apic_set_redir(sc, p, sc->sc_pins[p].ip_vector,
 				    sc->sc_pins[p].ip_cpu);
 	}
+	aprint_normal("%s reenabling done ..\n", device_xname(ioapics->sc_dev));
 
 	ioapic_enable();
 }
diff --git a/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c b/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c
index 41d89e06ff5..e61e34cdadf 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c
@@ -3271,9 +3271,11 @@ static void valleyview_disable_rps(struct drm_device *dev)
 	gen6_disable_rps_interrupts(dev);
 }
 
+int sequence = 0;
 static void intel_print_rc6_info(struct drm_device *dev, u32 mode)
 {
-	DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n",
+	DRM_INFO("seq: %d, .. Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n",
+	sequence++,
 		 (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off",
 		 (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off",
 		 (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off");
@@ -3341,7 +3343,9 @@ static void gen8_enable_rps(struct drm_device *dev)
 	/* 3: Enable RC6 */
 	if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
 		rc6_mask = GEN6_RC_CTL_RC6_ENABLE;
+
 	intel_print_rc6_info(dev, rc6_mask);
+
 	I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
 				    GEN6_RC_CTL_EI_MODE(1) |
 				    rc6_mask);