0 > boot >> NetBSD/macppc OpenFirmware Boot, Revision 1.5 >> (root@mini, Wed Sep 21 00:23:54 JST 2005) 4616764+199060 [240848+221850]=0x508f08 start=0x100000 Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 The NetBSD Foundation, Inc. All rights reserved. Copyright (c) 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. NetBSD 3.99.9 (DEBUG) #8: Mon Oct 24 21:03:18 JST 2005 makoto@st4200:/export/20050928/checkout/src/sys/arch/macppc/compile/DEBUG total memory = 160 MB avail memory = 148 MB bootpath: /bandit@F2000000/ohare@10/ata@20000/ata-disk@0 mainbus0 (root) cpu0 at mainbus0: 750 (Revision 202), ID 0 (primary) cpu0: HID0 8090c0ac cpu0: 512KB, 2:1, PB2 SRAM backside L2 cache bandit0 at mainbus0 pci0 at bandit0 bus 0 pci0: i/o space, memory space enabled pchb0 at pci0 dev 11 function 0 pchb0: Apple Computer Bandit Host-PCI Bridge (rev. 0x03) ex0 at pci0 dev 13 function 0: 3Com 3c905-TX 10/100 Ethernet (rev. 0x0) ex0: interrupting at irq 23 ex0: MAC address 00:60:08:c2:6a:71 nsphy0 at ex0 phy 24: DP83840 10/100 media interface, rev. 1 nsphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto ppb0 at pci0 dev 14 function 0: PCI configuration registers: Common header: 0x00: 0x00221014 0x02800007 0x06040001 0x00012008 Vendor Name: IBM (0x1014) Device Name: 82351 PCI-PCI Bridge (0x0022) Command register: 0x0007 I/O space accesses: on Memory space accesses: on Bus mastering: on Special cycles: off MWI transactions: off Palette snooping: off Parity error checking: off Address/data stepping: off System error (SERR): off Fast back-to-back transactions: off Status register: 0x0280 Capability List support: off 66 MHz capable: off User Definable Features (UDF) support: off Fast back-to-back capable: on Data parity error detected: off DEVSEL timing: medium (0x1) Slave signaled Target Abort: off Master received Target Abort: off Master received Master Abort: off Asserted System Error (SERR): off Parity error detected: off Class Name: bridge (0x06) Subclass Name: PCI (0x04) Interface: 0x00 Revision ID: 0x01 BIST: 0x00 Header Type: 0x01 (0x01) Latency Timer: 0x20 Cache Line Size: 0x08 Type 1 (PCI-PCI bridge) header: 0x10: 0x00000000 0x00000000 0x00010100 0x24800111 0x20: 0x80708080 0x80708080 0x00000000 0x00000000 0x30: 0x00000000 0x00000000 0x00000000 0x00040000 Base address register at 0x10 not implemented(?) Base address register at 0x14 not implemented(?) Primary bus number: 0x00 Secondary bus number: 0x01 Subordinate bus number: 0x01 Secondary bus latency timer: 0x00 Secondary status register: 0x2480 66 MHz capable: off User Definable Features (UDF) support: off Fast back-to-back capable: on Data parity error detected: off DEVSEL timing: slow (0x2) Signaled Target Abort: off Received Target Abort: off Received Master Abort: on System Error: off Parity Error: off I/O region: base register: 0x11 limit register: 0x01 base upper 16 bits register: 0x0000 limit upper 16 bits register: 0x0000 Memory region: base register: 0x8080 limit register: 0x8070 Prefetchable memory region: base register: 0x8080 limit register: 0x8070 base upper 32 bits register: 0x00000000 limit upper 32 bits register: 0x00000000 Reserved @ 0x34: 0x00000000 Expansion ROM Base Address: 0x00000000 Interrupt line: 0x00 Interrupt pin: 0x00 (none) Bridge control register: 0x0004 Parity error response: off Secondary SERR forwarding: off ISA enable: on VGA enable: off Master abort reporting: off Secondary bus reset: off Fast back-to-back capable: off Device-dependent header: 0x40: 0x20151c00 0x00000000 0x00000000 0x0007f8f8 0x50: 0x00000000 0x00000000 0x00000000 0x00000000 0x60: 0x00000000 0x00000000 0x00000000 0x00000000 0x70: 0x0000fff0 0x80000000 0x80000000 0x00000001 0x80: 0x00000000 0x00000000 0x00000000 0x00000000 0x90: 0x00000000 0x00000000 0x00000000 0x00000000 0xa0: 0x00000000 0x00000000 0x00000000 0x00000000 0xb0: 0x00000000 0x00000000 0x00000000 0x00000000 0xc0: 0x00000000 0x00000000 0x00000000 0x00000000 0xd0: 0x00000000 0x00000000 0x00000000 0x00000000 0xe0: 0x00000000 0x00000000 0x00000000 0x00000000 0xf0: 0x00000000 0x00000000 0x00000000 0x00000000 Don't know how to pretty-print device-dependent header. IBM 82351 PCI-PCI Bridge (PCI bridge, revision 0x01) at ? dev 14 function 0 (intrswiz 0, intrpin 0, i/o on, mem on, no quirks): IBM 82351 PCI-PCI Bridge (rev. 0x01) ** aprint normal pa_id(221014) pa_class(6040001) pa_tag(80007000) pci1 at ppb0 bus 1 pci1: i/o space, memory space enabled tl0 at pci1 dev 0 function 0: PCI configuration registers: Common header: 0x00: 0xae400e11 0x02800000 0x02800010 0x00000000 Vendor Name: Compaq (0x0e11) Device Name: Dual Port Netelligent 10/100 TX (0xae40) Command register: 0x0000 I/O space accesses: off Memory space accesses: off Bus mastering: off Special cycles: off MWI transactions: off Palette snooping: off Parity error checking: off Address/data stepping: off System error (SERR): off Fast back-to-back transactions: off Status register: 0x0280 Capability List support: off 66 MHz capable: off User Definable Features (UDF) support: off Fast back-to-back capable: on Data parity error detected: off DEVSEL timing: medium (0x1) Slave signaled Target Abort: off Master received Target Abort: off Master received Master Abort: off Asserted System Error (SERR): off Parity error detected: off Class Name: network (0x02) Subclass Name: miscellaneous (0x80) Interface: 0x00 Revision ID: 0x10 BIST: 0x00 Header Type: 0x00 (0x00) Latency Timer: 0x00 Cache Line Size: 0x00 Type 0 ("normal" device) header: 0x10: 0x00000001 0x00000000 0x00000000 0x00000000 0x20: 0x00000000 0x00000000 0x10000107 0x00000000 0x30: 0x00000000 0x00000000 0x00000000 0x00000100 Base address register at 0x10 type: 32-bit i/o base: 0x00000000, size: 0x00000010 Base address register at 0x14 not implemented(?) Base address register at 0x18 not implemented(?) Base address register at 0x1c not implemented(?) Base address register at 0x20 not implemented(?) Base address register at 0x24 not implemented(?) Cardbus CIS Pointer: 0x10000107 Subsystem vendor ID: 0x0000 Subsystem ID: 0x0000 Expansion ROM Base Address: 0x00000000 Reserved @ 0x34: 0x00000000 Reserved @ 0x38: 0x00000000 Maximum Latency: 0x00 Minimum Grant: 0x00 Interrupt pin: 0x01 (pin A) Interrupt line: 0x00 Device-dependent header: 0x40: 0x00000000 0x00000000 0x00000000 0x00000000 0x50: 0x00000000 0x00000000 0x00000000 0x00000000 0x60: 0x00000000 0x00000000 0x00000000 0x00000000 0x70: 0x00000000 0x00000000 0x00000000 0x00000000 0x80: 0x00000000 0x00000000 0x00000000 0x00000000 0x90: 0x00000000 0x00000000 0x00000000 0x00000000 0xa0: 0x00000000 0x00000000 0x00000000 0x00000000 0xb0: 0x00000000 0x00000091 0x00000000 0x00000000 0xc0: 0x00000000 0x00000000 0x00000000 0x00000000 0xd0: 0x00000000 0x00000000 0x00000000 0x00000000 0xe0: 0x00000000 0x00000000 0x00000000 0x00000000 0xf0: 0x00000000 0x00000000 0x00000000 0x00000000 Don't know how to pretty-print device-dependent header. Compaq Dual Port Netelligent 10/100 TX (miscellaneous network, revision 0x10) at ? dev 0 function 0 (intrswiz 0, intrpin 0x1, i/o off, mem off, no quirks) tl0: unable to map device registers tl1 at pci1 dev 1 function 0: PCI configuration registers: Common header: 0x00: 0xae400e11 0x02800000 0x02800010 0x00000000 Vendor Name: Compaq (0x0e11) Device Name: Dual Port Netelligent 10/100 TX (0xae40) Command register: 0x0000 I/O space accesses: off Memory space accesses: off Bus mastering: off Special cycles: off MWI transactions: off Palette snooping: off Parity error checking: off Address/data stepping: off System error (SERR): off Fast back-to-back transactions: off Status register: 0x0280 Capability List support: off 66 MHz capable: off User Definable Features (UDF) support: off Fast back-to-back capable: on Data parity error detected: off DEVSEL timing: medium (0x1) Slave signaled Target Abort: off Master received Target Abort: off Master received Master Abort: off Asserted System Error (SERR): off Parity error detected: off Class Name: network (0x02) Subclass Name: miscellaneous (0x80) Interface: 0x00 Revision ID: 0x10 BIST: 0x00 Header Type: 0x00 (0x00) Latency Timer: 0x00 Cache Line Size: 0x00 Type 0 ("normal" device) header: 0x10: 0x00000001 0x00000000 0x00000000 0x00000000 0x20: 0x00000000 0x00000000 0x10000107 0x00000000 0x30: 0x00000000 0x00000000 0x00000000 0x00000100 Base address register at 0x10 type: 32-bit i/o base: 0x00000000, size: 0x00000010 Base address register at 0x14 not implemented(?) Base address register at 0x18 not implemented(?) Base address register at 0x1c not implemented(?) Base address register at 0x20 not implemented(?) Base address register at 0x24 not implemented(?) Cardbus CIS Pointer: 0x10000107 Subsystem vendor ID: 0x0000 Subsystem ID: 0x0000 Expansion ROM Base Address: 0x00000000 Reserved @ 0x34: 0x00000000 Reserved @ 0x38: 0x00000000 Maximum Latency: 0x00 Minimum Grant: 0x00 Interrupt pin: 0x01 (pin A) Interrupt line: 0x00 Device-dependent header: 0x40: 0x00000000 0x00000000 0x00000000 0x00000000 0x50: 0x00000000 0x00000000 0x00000000 0x00000000 0x60: 0x00000000 0x00000000 0x00000000 0x00000000 0x70: 0x00000000 0x00000000 0x00000000 0x00000000 0x80: 0x00000000 0x00000000 0x00000000 0x00000000 0x90: 0x00000000 0x00000000 0x00000000 0x00000000 0xa0: 0x00000000 0x00000000 0x00000000 0x00000000 0xb0: 0x00000000 0x00000091 0x00000000 0x00000000 0xc0: 0x00000000 0x00000000 0x00000000 0x00000000 0xd0: 0x00000000 0x00000000 0x00000000 0x00000000 0xe0: 0x00000000 0x00000000 0x00000000 0x00000000 0xf0: 0x00000000 0x00000000 0x00000000 0x00000000 Don't know how to pretty-print device-dependent header. Compaq Dual Port Netelligent 10/100 TX (miscellaneous network, revision 0x10) at ? dev 1 function 0 (intrswiz 0x1, intrpin 0x2, i/o off, mem off, no quirks) tl1: unable to map device registers